    45: void arm_biquad_cascade_df1_fast_q15( 
    46:   const arm_biquad_casd_df1_inst_q15 * S, 
    47:   q15_t * pSrc, 
    48:   q15_t * pDst, 
    49:   uint32_t blockSize) 
0x00000184 E8BD81F0  POP           {r4-r8,pc}
0x00000188 E92D4FFF  PUSH          {r0-r11,lr}
0x0000018C B083      SUB           sp,sp,#0x0C
0x0000018E 4607      MOV           r7,r0
0x00000190 F8DDC010  LDR           r12,[sp,#0x10]
0x00000194 F8DD8014  LDR           r8,[sp,#0x14]
0x00000198 F997B00C  LDRSB         r11,[r7,#0x0C]
0x0000019C F1CB0B0F  RSB           r11,r11,#0x0F
0x000001A0 F8CDB008  STR           r11,[sp,#0x08]
0x000001A4 687A      LDR           r2,[r7,#0x04]
0x000001A6 68BE      LDR           r6,[r7,#0x08]
0x000001A8 F997B000  LDRSB         r11,[r7,#0x00]
0x000001AC F8CDB000  STR           r11,[sp,#0x00]
0x000001B0 BF00      NOP           
0x000001B2 F8569B04  LDR           r9,[r6],#0x04
0x000001B6 F856AB04  LDR           r10,[r6],#0x04
0x000001BA F856EB04  LDR           lr,[r6],#0x04
0x000001BE F8523B04  LDR           r3,[r2],#0x04
0x000001C2 F8521904  LDR           r1,[r2],#-0x04
0x000001C6 F8DDB018  LDR           r11,[sp,#0x18]
0x000001CA EA4F0B5B  LSR           r11,r11,#1
0x000001CE F8CDB004  STR           r11,[sp,#0x04]

0x000001D2 E035      B             0x00000240
0x000001D4 F85C4B04  LDR           r4,[r12],#0x04
0x000001D8 FB29F004  SMUAD         r0,r9,r4
0x000001DC FB2A0503  SMLAD         r5,r10,r3,r0
0x000001E0 FB2E5501  SMLAD         r5,lr,r1,r5
0x000001E4 F8DDB008  LDR           r11,[sp,#0x08]
0x000001E8 FA45FB0B  ASR           r11,r5,r11
0x000001EC F30B000F  SSAT          r0,#16,r11
0x000001F0 46A3      MOV           r11,r4
0x000001F2 F3634B1F  BFI           r11,r3,#16,#16
0x000001F6 465B      MOV           r3,r11
0x000001F8 4683      MOV           r11,r0
0x000001FA F3614B1F  BFI           r11,r1,#16,#16
0x000001FE 4659      MOV           r1,r11
0x00000200 FB29F014  SMUADX        r0,r9,r4
0x00000204 FB2A0503  SMLAD         r5,r10,r3,r0
0x00000208 FB2E5501  SMLAD         r5,lr,r1,r5
0x0000020C F8DDB008  LDR           r11,[sp,#0x08]
0x00000210 FA45FB0B  ASR           r11,r5,r11
0x00000214 F30B000F  SSAT          r0,#16,r11
0x00000218 468B      MOV           r11,r1
0x0000021A F3604B1F  BFI           r11,r0,#16,#16
0x0000021E F848BB04  STR           r11,[r8],#0x04
0x00000222 EA4F4B24  ASR           r11,r4,#16
0x00000226 F3634B1F  BFI           r11,r3,#16,#16
0x0000022A 465B      MOV           r3,r11
0x0000022C 4683      MOV           r11,r0
0x0000022E F3614B1F  BFI           r11,r1,#16,#16
0x00000232 4659      MOV           r1,r11
0x00000234 F8DDB004  LDR           r11,[sp,#0x04]
0x00000238 F1AB0B01  SUB           r11,r11,#0x01
0x0000023C F8CDB004  STR           r11,[sp,#0x04]
0x00000240 F8DDB004  LDR           r11,[sp,#0x04]
0x00000244 F1BB0F00  CMP           r11,#0x00
0x00000248 D1C4      BNE           0x000001D4
0x0000024A F8DDB018  LDR           r11,[sp,#0x18]
0x0000024E F00B0B01  AND           r11,r11,#0x01
0x00000252 F1BB0F00  CMP           r11,#0x00
0x00000256 D019      BEQ           0x0000028C
0x00000258 F93C4B02  LDRSH         r4,[r12],#0x02
0x0000025C FB29F004  SMUAD         r0,r9,r4
0x00000260 FB2A0503  SMLAD         r5,r10,r3,r0
0x00000264 FB2E5501  SMLAD         r5,lr,r1,r5
0x00000268 F8DDB008  LDR           r11,[sp,#0x08]
0x0000026C FA45FB0B  ASR           r11,r5,r11
0x00000270 F30B000F  SSAT          r0,#16,r11
0x00000274 FA0FFB80  SXTH          r11,r0
0x00000278 F828BB02  STRH          r11,[r8],#0x02
0x0000027C 46A3      MOV           r11,r4
0x0000027E F3634B1F  BFI           r11,r3,#16,#16
0x00000282 465B      MOV           r3,r11
0x00000284 4683      MOV           r11,r0
0x00000286 F3614B1F  BFI           r11,r1,#16,#16
0x0000028A 4659      MOV           r1,r11
0x0000028C F8DDC014  LDR           r12,[sp,#0x14]
0x00000290 F8DDC014  LDR           r12,[sp,#0x14]
0x00000294 46E0      MOV           r8,r12
0x00000296 F8423B04  STR           r3,[r2],#0x04
0x0000029A F8421B04  STR           r1,[r2],#0x04
0x0000029E F8DDB000  LDR           r11,[sp,#0x00]
0x000002A2 F1AB0B01  SUB           r11,r11,#0x01
0x000002A6 F8CDB000  STR           r11,[sp,#0x00]
0x000002AA F8DDB000  LDR           r11,[sp,#0x00]
0x000002AE F1BB0F00  CMP           r11,#0x00
0x000002B2 F47FAF7E  BNE.W         0x000001B2


    51: //======================================================================================================== 
    52: void arm_biquad_cascade_df1_fast_q15( 
    53:   const arm_biquad_casd_df1_inst_q15 * S, 
    54:   q15_t * pSrc, 
    55:   q15_t * pDst, 
    56:   uint32_t blockSize) 
0x00000174 BD70      POP      {r4-r6,pc}
    57: { 
    58:   q15_t *pIn = pSrc;                             /*  Source pointer                               */ 
    59:   q15_t *pOut = pDst;                            /*  Destination pointer                          */ 
    60:   q31_t in;                                      /*  Temporary variable to hold input value       */ 
    61:   q31_t out;                                     /*  Temporary variable to hold output value      */ 
    62:   q31_t b0;                                      /*  Temporary variable to hold bo value          */ 
    63:   q31_t b1, a1;                                  /*  Filter coefficients                          */ 
    64:   q31_t state_in, state_out;                     /*  Filter state variables                       */ 
    65:   q31_t acc;                                     /*  Accumulator                                  */ 
0x00000176 E92D4FFF  PUSH     {r0-r11,lr}
    66:   int32_t shift = (int32_t) (15 - S->postShift); /*  Post shift                                   */ 
    67:   q15_t *pState = S->pState;                     /*  State pointer                                */ 
    68:   q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */ 
0x0000017A F990200C  LDRSB    r2,[r0,#0x0C]
0x0000017E B083      SUB      sp,sp,#0x0C
0x00000180 F1C20B0F  RSB      r11,r2,#0x0F
0x00000184 E9D05201  LDRD     r5,r2,[r0,#0x04]
    69:   uint32_t sample, stage = S->numStages;         /*  Stage loop counter                           */ 
0x00000188 F9900000  LDRSB    r0,[r0,#0x00]
0x0000018C 9B05      LDR      r3,[sp,#0x14]
0x0000018E 9000      STR      r0,[sp,#0x00]
    97:     sample = blockSize >> 1u; 
    98:  
    99:     /* First part of the processing with loop unrolling.  Compute 2 outputs at a time. 
   100:      ** a second loop below computes the remaining 1 sample. */ 
0x00000190 9806      LDR      r0,[sp,#0x18]
0x00000192 0840      LSRS     r0,r0,#1
0x00000194 F8CD0008  STR      r0,[sp,#0x08]
0x00000198 F8529B04  LDR      r9,[r2],#0x04
    86:     state_in = *__SIMD32(pState)++; 
    87:  
    88:     /* Read the output state values from the state buffer:  y[n-1], y[n-2] */ 
0x0000019C 6828      LDR      r0,[r5,#0x00]
    80:     b1 = *__SIMD32(pCoeffs)++; 
    81:  
    82:     /* Read the a1 and a2 coefficients using SIMD */ 
    83:     a1 = *__SIMD32(pCoeffs)++; 
    84:  
    85:     /* Read the input state values from the state buffer:  x[n-1], x[n-2] */ 
    86:     state_in = *__SIMD32(pState)++; 
    87:  
    88:     /* Read the output state values from the state buffer:  y[n-1], y[n-2] */ 
0x0000019E F852AB04  LDR      r10,[r2],#0x04
    89:     state_out = *__SIMD32(pState)--; 
    90:  
    91:     /* Apply loop unrolling and compute 2 output values simultaneously. */ 
    92:     /*      The variable acc hold output values that are being computed: 
    93:      * 
    94:      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 
    95:      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 
    96:      */ 
    97:     sample = blockSize >> 1u; 
    98:  
    99:     /* First part of the processing with loop unrolling.  Compute 2 outputs at a time. 
   100:      ** a second loop below computes the remaining 1 sample. */ 
0x000001A2 686C      LDR      r4,[r5,#0x04]
    83:     a1 = *__SIMD32(pCoeffs)++; 
    84:  
    85:     /* Read the input state values from the state buffer:  x[n-1], x[n-2] */ 
    86:     state_in = *__SIMD32(pState)++; 
    87:  
    88:     /* Read the output state values from the state buffer:  y[n-1], y[n-2] */ 
    89:     state_out = *__SIMD32(pState)--; 
    90:  
    91:     /* Apply loop unrolling and compute 2 output values simultaneously. */ 
    92:     /*      The variable acc hold output values that are being computed: 
    93:      * 
    94:      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 
    95:      *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] 
    96:      */ 
    97:     sample = blockSize >> 1u; 
    98:  
    99:     /* First part of the processing with loop unrolling.  Compute 2 outputs at a time. 
   100:      ** a second loop below computes the remaining 1 sample. */ 
0x000001A4 F8527B04  LDR      r7,[r2],#0x04
0x000001A8 9501      STR      r5,[sp,#0x04]
   101:     while(sample > 0u) 
   102:     { 
   103:  
   104:       /* Read the input */ 
0x000001AA 9D02      LDR      r5,[sp,#0x08]
0x000001AC E024      B        0x000001F8
   105:       in = *__SIMD32(pIn)++; 
   106:  
   107:       /* out =  b0 * x[n] + 0 * 0 */ 
0x000001AE BF00      NOP      
0x000001B0 F8516B04  LDR      r6,[r1],#0x04
   108:       out = __SMUAD(b0, in); 
   109:       /* acc =  b1 * x[n-1] + acc +=  b2 * x[n-2] + out */ 
0x000001B4 FB29FC06  SMUAD    r12,r9,r6
   110:       acc = __SMLAD(b1, state_in, out); 
   111:       /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */ 
0x000001B8 FB2ACC00  SMLAD    r12,r10,r0,r12
   112:       acc = __SMLAD(a1, state_out, acc); 
   113:  
   114:       /* The result is converted from 3.29 to 1.31 and then saturation is applied */ 
0x000001BC FB27CC04  SMLAD    r12,r7,r4,r12
   115:       out = __SSAT((acc >> shift), 16); 
   116:  
   117:       /* Every time after the output is computed state should be updated. */ 
   118:       /* The states should be updated as:  */ 
   119:       /* Xn2 = Xn1    */ 
   120:       /* Xn1 = Xn     */ 
   121:       /* Yn2 = Yn1    */ 
   122:       /* Yn1 = acc   */ 
   123:       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ 
   124:       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ 
   125:  
   126: #ifndef  ARM_MATH_BIG_ENDIAN 
   127:  
0x000001C0 FA4CFC0B  ASR      r12,r12,r11
0x000001C4 F30C0C0F  SSAT     r12,#16,r12
   128:       state_in = __PKHBT(in, state_in, 16); 
0x000001C8 EAC64E00  PKHBT    lr,r6,r0,LSL #16
   129:       state_out = __PKHBT(out, state_out, 16); 
   130:  
   131: #else 
   132:  
   133:       state_in = __PKHBT(state_in >> 16, (in >> 16), 16); 
   134:       state_out = __PKHBT(state_out >> 16, (out), 16); 
   135:  
   136: #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */ 
   137:  
   138:       /* out =  b0 * x[n] + 0 * 0 */ 
0x000001CC EACC4404  PKHBT    r4,r12,r4,LSL #16
   139:       out = __SMUADX(b0, in); 
   140:       /* acc0 =  b1 * x[n-1] , acc0 +=  b2 * x[n-2] + out */ 
0x000001D0 FB29FC16  SMUADX   r12,r9,r6
   141:       acc = __SMLAD(b1, state_in, out); 
   142:       /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */ 
0x000001D4 FB2AC00E  SMLAD    r0,r10,lr,r12
   143:       acc = __SMLAD(a1, state_out, acc); 
   144:  
   145:       /* The result is converted from 3.29 to 1.31 and then saturation is applied */ 
0x000001D8 FB270004  SMLAD    r0,r7,r4,r0
   146:       out = __SSAT((acc >> shift), 16); 
   147:  
   148:  
   149:       /* Store the output in the destination buffer. */ 
   150:  
   151: #ifndef  ARM_MATH_BIG_ENDIAN 
   152:  
0x000001DC FA40F00B  ASR      r0,r0,r11
0x000001E0 F3000C0F  SSAT     r12,#16,r0
   153:       *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16); 
   154:  
   155: #else 
   156:  
   157:       *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16); 
   158:  
   159: #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */ 
   160:  
   161:       /* Every time after the output is computed state should be updated. */ 
   162:       /* The states should be updated as:  */ 
   163:       /* Xn2 = Xn1    */ 
   164:       /* Xn1 = Xn     */ 
   165:       /* Yn2 = Yn1    */ 
   166:       /* Yn1 = acc   */ 
   167:       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ 
   168:       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ 
   169:  
   170: #ifndef  ARM_MATH_BIG_ENDIAN 
   171:  
0x000001E4 EAC4400C  PKHBT    r0,r4,r12,LSL #16
0x000001E8 F8430B04  STR      r0,[r3],#0x04
   172:       state_in = __PKHBT(in >> 16, state_in, 16); 
0x000001EC 1436      ASRS     r6,r6,#16
0x000001EE EAC6400E  PKHBT    r0,r6,lr,LSL #16
   173:       state_out = __PKHBT(out, state_out, 16); 
   174:  
   175: #else 
   176:  
   177:       state_in = __PKHBT(state_in >> 16, in, 16); 
   178:       state_out = __PKHBT(state_out >> 16, out, 16); 
   179:  
   180: #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */ 
   181:  
   182:  
   183:       /* Decrement the loop counter */ 
   184:       sample--; 
   185:  
   186:     } 
   187:  
   188:     /* If the blockSize is not a multiple of 2, compute any remaining output samples here. 
   189:      ** No loop unrolling is used. */ 
   190:  
0x000001F2 EACC4404  PKHBT    r4,r12,r4,LSL #16
0x000001F6 1E6D      SUBS     r5,r5,#1
   101:     while(sample > 0u) 
0x000001F8 2D00      CMP      r5,#0x00
0x000001FA D1D9      BNE      0x000001B0
   191:     if((blockSize & 0x1u) != 0u) 
   192:     { 
   193:       /* Read the input */ 
0x000001FC 9D06      LDR      r5,[sp,#0x18]
0x000001FE 07ED      LSLS     r5,r5,#31
0x00000200 D010      BEQ      0x00000224
   194:       in = *pIn++; 
   195:  
   196:       /* out =  b0 * x[n] + 0 * 0 */ 
   197:  
   198: #ifndef  ARM_MATH_BIG_ENDIAN 
   199:  
0x00000202 F9B15000  LDRSH    r5,[r1,#0x00]
   200:       out = __SMUAD(b0, in); 
   201:  
   202: #else 
   203:  
   204:       out = __SMUADX(b0, in); 
   205:  
   206: #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */ 
   207:  
   208:       /* acc =  b1 * x[n-1], acc +=  b2 * x[n-2] + out */ 
0x00000206 FB29F105  SMUAD    r1,r9,r5
   209:       acc = __SMLAD(b1, state_in, out); 
   210:       /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */ 
0x0000020A FB2A1100  SMLAD    r1,r10,r0,r1
   211:       acc = __SMLAD(a1, state_out, acc); 
   212:  
   213:       /* The result is converted from 3.29 to 1.31 and then saturation is applied */ 
0x0000020E FB271104  SMLAD    r1,r7,r4,r1
   214:       out = __SSAT((acc >> shift), 16); 
   215:  
   216:       /* Store the output in the destination buffer. */ 
0x00000212 FA41F10B  ASR      r1,r1,r11
0x00000216 F301010F  SSAT     r1,#16,r1
   217:       *pOut++ = (q15_t) out; 
   218:  
   219:       /* Every time after the output is computed state should be updated. */ 
   220:       /* The states should be updated as:  */ 
   221:       /* Xn2 = Xn1    */ 
   222:       /* Xn1 = Xn     */ 
   223:       /* Yn2 = Yn1    */ 
   224:       /* Yn1 = acc   */ 
   225:       /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ 
   226:       /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ 
   227:  
   228: #ifndef  ARM_MATH_BIG_ENDIAN 
   229:  
0x0000021A 8019      STRH     r1,[r3,#0x00]
   230:       state_in = __PKHBT(in, state_in, 16); 
0x0000021C EAC54000  PKHBT    r0,r5,r0,LSL #16
   231:       state_out = __PKHBT(out, state_out, 16); 
   232:  
   233: #else 
   234:  
   235:       state_in = __PKHBT(state_in >> 16, in, 16); 
   236:       state_out = __PKHBT(state_out >> 16, out, 16); 
   237:  
   238: #endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */ 
   239:  
   240:     } 
   241:  
   242:     /*  The first stage goes from the input buffer to the output buffer.  */ 
   243:     /*  Subsequent (numStages - 1) occur in-place in the output buffer  */ 
   244:     pIn = pDst; 
   245:  
   246:     /* Reset the output pointer */ 
   247:     pOut = pDst; 
   248:  
   249:     /*  Store the updated state variables back into the state array */ 
0x00000220 EAC14404  PKHBT    r4,r1,r4,LSL #16
   250:     *__SIMD32(pState)++ = state_in; 
0x00000224 9D01      LDR      r5,[sp,#0x04]
   247:     pOut = pDst; 
   248:  
   249:     /*  Store the updated state variables back into the state array */ 
   250:     *__SIMD32(pState)++ = state_in; 
0x00000226 9905      LDR      r1,[sp,#0x14]
0x00000228 6028      STR      r0,[r5,#0x00]
   251:     *__SIMD32(pState)++ = state_out; 
   252:  
   253:  
   254:     /* Decrement the loop counter */ 
0x0000022A 9D01      LDR      r5,[sp,#0x04]
0x0000022C 460B      MOV      r3,r1
0x0000022E 606C      STR      r4,[r5,#0x04]
   255:     stage--; 
   256:  
0x00000230 9800      LDR      r0,[sp,#0x00]
0x00000232 F1050508  ADD      r5,r5,#0x08
0x00000236 1E40      SUBS     r0,r0,#1
   257:   } while(stage > 0u); 
0x00000238 9000      STR      r0,[sp,#0x00]
0x0000023A D1AD      BNE      0x00000198
   258: } 
   259:  
   260: //======================================================================================================== 
   261: void test_biquad_init (void) 
0x0000023C B007      ADD      sp,sp,#0x1C
0x0000023E E8BD8FF0  POP      {r4-r11,pc}
   262: { 
0x00000242 B538      PUSH     {r3-r5,lr}
   263:     arm_biquad_cascade_df1_init_q15(&Sref, numStages, pCoeffs, pStateref, postShift); 
0x00000244 4C20      LDR      r4,[pc,#128]  ; @0x000002C8
0x00000246 4B21      LDR      r3,[pc,#132]  ; @0x000002CC
0x00000248 F104020C  ADD      r2,r4,#0x0C
0x0000024C F9940001  LDRSB    r0,[r4,#0x01]
0x00000250 9000      STR      r0,[sp,#0x00]
0x00000252 7821      LDRB     r1,[r4,#0x00]
0x00000254 F1A30020  SUB      r0,r3,#0x20
0x00000258 F7FFFF80  BL.W     arm_biquad_cascade_df1_init_q15 (0x0000015C)
   264:     arm_biquad_cascade_df1_init_q15(&Sfwd, numStages, pCoeffs, pStatefwd, postShift); 
0x0000025C F9940001  LDRSB    r0,[r4,#0x01]
0x00000260 4B1A      LDR      r3,[pc,#104]  ; @0x000002CC
0x00000262 9000      STR      r0,[sp,#0x00]
0x00000264 3310      ADDS     r3,r3,#0x10
0x00000266 F104020C  ADD      r2,r4,#0x0C
0x0000026A 7821      LDRB     r1,[r4,#0x00]
0x0000026C F1A30020  SUB      r0,r3,#0x20
0x00000270 F7FFFF74  BL.W     arm_biquad_cascade_df1_init_q15 (0x0000015C)
   265: } 
   266:  
   267: void test_biquad_run (void) 
0x00000274 BD38      POP      {r3-r5,pc}
   268: { 
   269:         int i; 
   270:         extern void arm_biquad_cascade_df1_fast_q15_fwd_asm(void); 
   271:  
0x00000276 B510      PUSH     {r4,lr}
   272:     for (i = 0; i < NSAMP; i++) {pSrcref[i] = 0x1000 * pSrcROM[i]; } 
0x00000278 4914      LDR      r1,[pc,#80]  ; @0x000002CC
0x0000027A 4C13      LDR      r4,[pc,#76]  ; @0x000002C8
0x0000027C 2000      MOVS     r0,#0x00
0x0000027E 3120      ADDS     r1,r1,#0x20
0x00000280 F1140424  ADDS     r4,r4,#0x24
0x00000284 F8142010  LDRB     r2,[r4,r0,LSL #1]
0x00000288 0312      LSLS     r2,r2,#12
0x0000028A F8212010  STRH     r2,[r1,r0,LSL #1]
0x0000028E 1C40      ADDS     r0,r0,#1
0x00000290 2820      CMP      r0,#0x20
0x00000292 DBF7      BLT      0x00000284
   273:     arm_biquad_cascade_df1_fast_q15    (&Sref, pSrcref, pDstref, blockSize); 
   274:  
0x00000294 480C      LDR      r0,[pc,#48]  ; @0x000002C8
0x00000296 490D      LDR      r1,[pc,#52]  ; @0x000002CC
0x00000298 E9D02301  LDRD     r2,r3,[r0,#0x04]
0x0000029C 3120      ADDS     r1,r1,#0x20
0x0000029E F1A10040  SUB      r0,r1,#0x40
0x000002A2 F7FFFF68  BL.W     arm_biquad_cascade_df1_fast_q15 (0x00000176)
   275:     for (i = 0; i < NSAMP; i++) {pSrcfwd[i] = 0x1000 * pSrcROM[i]; } 
0x000002A6 4909      LDR      r1,[pc,#36]  ; @0x000002CC
0x000002A8 2000      MOVS     r0,#0x00
0x000002AA 3160      ADDS     r1,r1,#0x60
0x000002AC F8142010  LDRB     r2,[r4,r0,LSL #1]
0x000002B0 0312      LSLS     r2,r2,#12
0x000002B2 F8212010  STRH     r2,[r1,r0,LSL #1]
0x000002B6 1C40      ADDS     r0,r0,#1
0x000002B8 2820      CMP      r0,#0x20
0x000002BA DBF7      BLT      0x000002AC
   276:     arm_biquad_cascade_df1_fast_q15_fwd_asm(); 
   277:          
0x000002BC F000F8C0  BL.W     arm_biquad_cascade_df1_fast_q15_fwd_asm (0x00000440)
   278:     ForDebug1 = 1; 
0x000002C0 4903      LDR      r1,[pc,#12]  ; @0x000002D0
0x000002C2 2001      MOVS     r0,#0x01
0x000002C4 6008      STR      r0,[r1,#0x00]
   279: } 
0x000002C6 BD10      POP      {r4,pc}
0x000002C8 0000      DCW      0x0000
0x000002CA 2000      DCW      0x2000
0x000002CC 008C      DCW      0x008C
0x000002CE 2000      DCW      0x2000
0x000002D0 0064      DCW      0x0064
0x000002D2 2000      DCW      0x2000
    10:  test_biquad_init (); 
0x000002D4 F7FFFFB5  BL.W     test_biquad_init (0x00000242)
    11:  test_biquad_run (); 
0x000002D8 F7FFFFCD  BL.W     test_biquad_run (0x00000276)
    12:  while(1);   
0x000002DC E7FE      B        0x000002DC
0x000002DE 0000      MOVS     r0,r0
   139:                 LDR     R0, =SystemInit 
0x000002E0 4809      LDR      r0,[pc,#36]  ; @0x00000308
   140:                 BLX     R0 
0x000002E2 4780      BLX      r0
   141:                 LDR     R0, =__main 
0x000002E4 4809      LDR      r0,[pc,#36]  ; @0x0000030C
   142:                 BX      R0 
   143:                 ENDP 
   144:  
   145:  


